From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.1.3 (2006-06-01) on yquem.inria.fr X-Spam-Level: * X-Spam-Status: No, score=1.5 required=5.0 tests=AWL,HTML_00_10,HTML_MESSAGE, SPF_NEUTRAL autolearn=disabled version=3.1.3 Received: from discorde.inria.fr (discorde.inria.fr [192.93.2.38]) by yquem.inria.fr (Postfix) with ESMTP id 847BDBC6B for ; Thu, 6 Sep 2007 08:20:07 +0200 (CEST) Received: from nf-out-0910.google.com (nf-out-0910.google.com [64.233.182.185]) by discorde.inria.fr (8.13.6/8.13.6) with ESMTP id l866K72l027308 for ; Thu, 6 Sep 2007 08:20:07 +0200 Received: by nf-out-0910.google.com with SMTP id k4so51887nfd for ; Wed, 05 Sep 2007 23:20:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:from:to:subject:mime-version:content-type; bh=5weRfRYt3tliWLpwCmvQap0pS4NN4/yRhxzaIrOErd8=; b=ErB11KCNB4wXwva1HG3pdJjIleIEP5Fl8/7DkQHyNoDtFocVkoVcisl5w4oCbcYH9cItDDao8XPdPwz4PG4wNz85BkxmllMdkCwTzBeMzZR26O0MOX07K+rNO2a41aQSSfVpfHpu2k3+rSDxMD2TPr8CxiDri6sojZ3Urgy1r7A= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:from:to:subject:mime-version:content-type; b=JlFCIuquQZ93G0qCu7/PnEM+0Zfcm1VnrCTulIrPbnQatPwFpldZIIakOcHmzb5c+4ODZ1pdOwU2btPD6N1X32iSPuI8c05JTUN+yX9EcBoCQwuldUwkOyranWPardNyLdxCah6FWqL5sC8L091i/M/YlaJH2iIMuoS3g0wo2s8= Received: by 10.78.204.1 with SMTP id b1mr87105hug.1189059606070; Wed, 05 Sep 2007 23:20:06 -0700 (PDT) Received: by 10.78.189.19 with HTTP; Wed, 5 Sep 2007 23:20:06 -0700 (PDT) Message-ID: Date: Thu, 6 Sep 2007 08:20:06 +0200 From: Tom To: "Caml-list List" Subject: More registers in modern day CPUs MIME-Version: 1.0 Content-Type: multipart/alternative; boundary="----=_Part_43469_13337419.1189059606044" X-j-chkmail-Score: MSGID : 46DF9C17.000 on discorde : j-chkmail score : X : 0/20 1 0.000 -> 1 X-Miltered: at discorde with ID 46DF9C17.000 by Joe's j-chkmail (http://j-chkmail . ensmp . fr)! X-Spam: no; 0.00; ocaml:01 compiler:01 compiler:01 ocaml:01 compilers:01 compilers:01 emulate:01 implemented:02 implemented:02 guess:04 guess:04 variable:06 variable:06 quite:08 quite:08 X-Attachments: cset="UTF-8" cset="UTF-8" ------=_Part_43469_13337419.1189059606044 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Content-Disposition: inline (This question may not be OCaml specific, but I guess it is not specific at all, and there are quite some people here that have implemented compilers, so I post it here...) I was thinking about compiler implementation recently, and figured that it is difficult to design the compiler for a variable number of hardware registers - compared for designing a compiler witha fixed number of registers. However, would it be possible to "emulate" cpu registers using software? By keeping registers in the main memory, but accessing them often enough to keep them in primary cache? That would be quite fast I believe... - Tom ------=_Part_43469_13337419.1189059606044 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: 7bit Content-Disposition: inline (This question may not be OCaml specific, but I guess it is not specific at all, and there are quite some people here that have implemented compilers, so I post it here...)

I was thinking about compiler implementation recently, and figured that it is difficult to design the compiler for a variable number of hardware registers - compared for designing a compiler witha fixed number of registers.

However, would it be possible to "emulate" cpu registers using software? By keeping registers in the main memory, but accessing them often enough to keep them in primary cache? That would be quite fast I believe...

 - Tom
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