From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.1.3 (2006-06-01) on yquem.inria.fr X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=disabled version=3.1.3 Received: from discorde.inria.fr (discorde.inria.fr [192.93.2.38]) by yquem.inria.fr (Postfix) with ESMTP id BBBCABC6B for ; Thu, 6 Sep 2007 19:10:41 +0200 (CEST) Received: from postfix2-g20.free.fr (postfix2-g20.free.fr [212.27.60.43]) by discorde.inria.fr (8.13.6/8.13.6) with ESMTP id l86HAeCm032276 for ; Thu, 6 Sep 2007 19:10:41 +0200 Received: from smtp6-g19.free.fr (smtp6-g19.free.fr [212.27.42.36]) by postfix2-g20.free.fr (Postfix) with ESMTP id AA4141A033FA for ; Thu, 6 Sep 2007 18:11:36 +0200 (CEST) Received: from smtp6-g19.free.fr (localhost.localdomain [127.0.0.1]) by smtp6-g19.free.fr (Postfix) with ESMTP id 19953CA80D; Thu, 6 Sep 2007 19:10:36 +0200 (CEST) Received: from morgana (pat35-1-82-229-60-210.fbx.proxad.net [82.229.60.210]) by smtp6-g19.free.fr (Postfix) with ESMTP id CE9F39543; Thu, 6 Sep 2007 19:10:35 +0200 (CEST) Received: by morgana (Postfix, from userid 1000) id 806EC145399; Thu, 6 Sep 2007 19:10:35 +0200 (CEST) From: David MENTRE To: "Harrison, John R" Cc: "Caml-list List" Subject: Re: [Caml-list] More registers in modern day CPUs Organization: none References: <875c7e070709060755r1d0d099ds30a25ea78d0fd85a@mail.gmail.com> <46E01A27.1070207@janestcapital.com> <509223F0BF55E74FA1247D17207E7A0C01D75893@orsmsx419.amr.corp.intel.com> Date: Thu, 06 Sep 2007 19:10:35 +0200 In-Reply-To: <509223F0BF55E74FA1247D17207E7A0C01D75893@orsmsx419.amr.corp.intel.com> (John R. Harrison's message of "Thu, 6 Sep 2007 08:54:49 -0700") Message-ID: <87r6lb90tw.fsf@linux-france.org> User-Agent: Gnus/5.110006 (No Gnus v0.6) Emacs/21.4 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-Miltered: at discorde with ID 46E03490.003 by Joe's j-chkmail (http://j-chkmail . ensmp . fr)! X-Spam: no; 0.00; simd:01 gpg:01 sony:98 toshiba:98 2.1:98 2007.:98 caml-list:01 writes:01 data:02 allocated:02 tutorial:03 optimized:04 processors:04 bits:05 pgp:05 Hello, "Harrison, John R" writes: > Both the old Inmos Transputer and the the more recent IBM/Sony/Toshiba > Cell processor have/had a dedicated area of fast memory, rather like a > giant memory-based register file. The Cell SPE has 128 registers of 128 bits. http://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/FC857AE550F7EB83872571A80061F788/$file/CBE_Tutorial_v2.1_1March2007.pdf "Synergistic Processor Elements (SPEs) The eight SPEs are SIMD processors optimized for data-rich operations allocated to them by the PPE. Each of these identical elements contains a RISC core, 256-KB, software-controlled local store for instructions and data, and a large (128-bit, 128-entry) unified register file." Yours, d. -- GPG/PGP key: A3AD7A2A David MENTRE 5996 CC46 4612 9CA4 3562 D7AC 6C67 9E96 A3AD 7A2A