[Caml-list] 16th IEEE Symposium on Design and Diagnostics of ,Electronic Circuits and Systems (DDECS 2013) : 1st Call for Papers

[Caml-list] 16th IEEE Symposium on Design and Diagnostics of ,Electronic Circuits and Systems (DDECS 2013) : 1st Call for Papers

[Paris Kitsos]

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CALL FOR PAPERS

We apologize if you receive multiple copies of this CFP

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16th IEEE Symposium on Design and Diagnostics of
Electronic Circuits and Systems (DDECS 2013)

April 8 - 10, 2013, Karlovy Vary (Carlsbad), Czech Republic
http://www.fit.vutbr.cz/events/ddecs2013
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***** Submission deadline *****
January 8th, 2013		
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DDECS provides a forum for exchanging ideas, discussing research results, and
presenting practical applications in the areas of design, test, and diagnosis
of electronic circuits and systems. The Symposium is organized by Brno
University of Technology, Faculty of Information Technology, and sponsored by
the Test Technology Technical Council (TTTC) of the IEEE Computer Society.
  
===== Invited Speakers =====

Rolf Drechsler (University of Bremen)
Erik Jan Marinissen (IMEC)
Kaushik Roy (Purdue University)

===== Paper Submission =====

Prospective authors are cordially invited to submit original papers using the
electronic submission system at the Symposium web page. Papers in English with
a length of 6 pages maximum in IEEE conference style are expected. Accepted
papers will be included to the Symposium Proceedings and will be available
through the IEEE Xplore Digital Library. Specialized student and industrial
sessions, as well as embedded tutorials, will be organized at the symposium.
Proposals for tutorials can also be submitted through the electronic
submission system.

===== Topics of interest include but are not limited to =====

* SoC and NoC Design and Test		
* ASIC/FPGA Design		 			
* Built-in Self-Test and Self-Repair				
* Bio-Inspired Hardware					
* Design Verification/Validation					
* Formal Methods in System Design					
* Hardware/Software Co-Design			
* IP-based Design						
* Logic Synthesis							
* Defect/Fault Tolerance and Reliability				
* Design and Test in Nano-Technologies		
* Analog, Mixed-Signal, RF Design and Test			
* ATE Hardware and Software		
* Design for Testability and Diagnosis		
* On-line Testing		
* Embedded Systems Testing		
* Memory, Processor Testing		
* MEMS Testing		
* Physical Design					
* Dependable HW/SW Systems		

===== Important Dates =====

Submission deadline: January 8th, 2013		
Notification of acceptance: February 25th, 2013		
Camera-ready papers: March 10th, 2013

===== Committee =====

General Chair:
Lukas Sekanina, Brno University of Technology, Czech Republic

Program Chair:
Goerschwin Fey, German Aerospace Center, Germany

General Vice-chair:
Jaan Raik, Tallinn University of Technology, Estonia

Program Co-Chair:
Snorre Aunet, Norwegian University of Science and Technology, Norway

Topic Chairs:
Ondrej Novak, Technical University of Liberec, Czech Republic
Martin Danek, Academy of Sciences of the Czech Republic, Czech Republic
Said Hamdioui, TU Delft, Netherlands

Organizing Committee Chair:
Richard Ruzicka, Brno University of Technology, Czech Republic

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More information:
Lukas Sekanina,sekanina@fit.vutbr.cz
Goerschwin Fey,Goerschwin.Fey@dlr.de

-- 
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Dr. Paris Kitsos
Computer Science
School of Science & Technology
Hellenic Open University (HOU)
Tsamadou 13-15, Patras, GR-26222, Greece
Phone  : +30 2610 367535
Fax    : +30 2610 367528
Email  : pkitsos@eap.gr, pkitsos@ieee.org
Webpage: http://dsmc2.eap.gr/index.php/people/73-pk
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